I2C_SS_SCL_LCNT

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Interpret as I2C_SS_SCL_LCNT

Description

Standard Speed SCL Low Count Register

Fields

IC_SS_SCL_LCNT

This field must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for Standard Speed. This field is written only when the I2C interface is disabled which corresponds to the I2C_ENABLE[ENABLE] bit is set to 0x0. Writes at other times have no effect. The minimum valid value is 8; Hardware prevents values less than this being written, and if attempted, results in 8 being set.

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